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32 Mbit SPI Serial Flash
A Microchip Technology Company
SST25VF032B
Data Sheet
Pin Description
CE#
SO
1
2
8
7
V DD
HOLD#
CE#
SO
1
2
8
7
V DD
HOLD#
Top View
Top View
WP#
V SS
3
4
6
5
SCK
SI
WP#
V SS
3
4
6
5
SCK
SI
1327 8-SOIC P1.0
1327 8-WSON P1.0
Note: In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-of-
Write Detection” on page 12. for details.
Figure 2: Pin Assignments for 8-Lead SOIC
Table 1: Pin Description
Symbol
SCK
SI
Pin Name
Serial Clock
Serial Data Input
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
SO
Serial Data Output To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
RY/BY#
CE#
WP#
HOLD#
V DD
V SS
Ready / Busy pin
Chip Enable
Write Protect
Hold
Power Supply
Ground
Flash busy status pin in AAI mode if SO is configured as a hardware RY/BY#
pin.
The device is enabled by a high to low transition on CE#. CE# must remain low
for the duration of any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status reg-
ister.
To temporarily stop serial communication with SPI flash memory without reset-
ting the device.
To provide power supply voltage: 2.7-3.6V
T1.0 25071
?2011 Silicon Storage Technology, Inc.
4
DS25071A
12/11
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